EE 6900 is intended to provide graduate
students with an in-depth study of interconnection
networks for
high-performance computing (HPC) systems and multi-cores.
Interconnection networks offer an attractive and
economical solution to this communication crisis and are
fast becoming pervasive at all levels of digital system,
whether it be on-chip, inter-chip, inter-board and
inter-rack. As machine learning based accelerators begin
to dominate the market, this course will also analyze the
impact of data movement for deep learning
applications. Topics covered include:
[1] Introduction to Interconnection
Networks
[2] Topology
[3] Switching Techniques
[4] Taxonomy of Routing Algorithms
[5] Flow Control
[6] Router Micro-architecture and
[7] Hardware Accelerator & Deep Learning
The prerequisite for this course is EE
3613 or any basic computer architecture course. For more
information, please contact the instructor.
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